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Core3S500E XILINX Core Board FPGA

  • HẾT HÀNG
    Đặt mua để có hàng sớm
  • Giá bán: 750.000 đ

  • Dòng chip FPGA của XILINX với tốc độ 50MHz, điện áp hoạt động 1.15-3.3V, RAM: 360Kb......



Core3S500E is an FPGA core board that features an XC3S500E device onboard, supports further expansion.

  • onboard 1pcs XCF04S
  • integrated FPGA basic circuit, such as clock circuit
  • onboard nCONFIG button, RESET button, 4 x LEDs
  • all the I/O ports are accessible on the pin headers
  • onboard JTAG debugging/programming interface
  • 2.0mm header pitch design, suitable for being plugged-in your application system

What's On Board

XC3S500E core board on board resource
  1. XC3S500E:the XILINX Spartan-3E FPGA device which features:
    • Operating Frequency: 50MHz
    • Operating Voltage: 1.15V~3.3V
    • Package: QFP208
    • I/Os: 116
    • LEs: 500K
    • RAM: 360kb
    • DCMs: 4
    • Debugging/Programming: supports JTAG
  2. AMS1117-3.3, 3.3V voltage regulator
  3. AMS1117-2.5, 2.5V voltage regulator
  4. AMS1117-1.2, 1.2V voltage regulator
  5. XCF04S, onboard serial FLASH memory, for storing code
  6. Power indicator
  7. LEDs
  8. FPGA initialization indicator
  9. Reset button
  10. nCONFIG button: for re-configuring the FPGA chip, the equivalent of power reseting
  11. 50M active crystal oscillator
  12. JTAG interface: for debugging/programming
  13. FPGA pins expander, VCC, GND and all the I/O ports are accessible on expansion connectors for further expansion

Photos

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Note:
Core3S500E provides JTAG debugging interface, yet does NOT integrate any debugging function, a debugger is required.
Mother board and programmer/debugger in the photos are NOT included in the price.


Debugging/Programming Interface

The Core3S500E FPGA core board integrates JTAG interface for programming/debugging.

JTAG header pinout

Development Resources

Core3S500E FPGA core board comes with a User Guide CD including development resources listed as below:

  • Related software (Xilinx ISE 12 - supports Winxp/Win7, doesn't support Win8)
  • Demo code (Verilog, VHDL)
  • Schematic (PDF)
  • FPGA development documentations

Wiki: www.waveshare.com/wiki/Core3S500E

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